Netlist::Net(3) User Contributed Perl Documentation Netlist::Net(3)NAMEVerilog::Netlist::Net - Net for a Verilog Module
SYNOPSIS
use Verilog::Netlist;
...
my $net = $module->find_net ('signalname');
print $net->name;
DESCRIPTION
A Verilog::Netlist::Net object is created by Verilog::Netlist::Module
for every signal and input/output declaration, and parameter in the
current module.
ACCESSORS
See also Verilog::Netlist::Subclass for additional accessors and
methods.
$self->array
Any array (vector) declaration for the net. This is for
multidimensional signals, for the width of a signal, use
msb/lsb/width.
$self->comment
Returns any comments following the definition. keep_comments=>1
must be passed to Verilog::Netlist::new for comments to be
retained.
$self->data_type
The data type of the net. This may be a data type keyword
("integer", "logic", etc), user defined type from a type def, a
range ("[11:0]", "signed [1:0]" or "" for an implicit wire.
$self->decl_type
How the net was declared. A declaration keyword ("genvar",
"localparam", "parameter", "var") or "port" if only as a port - and
see the port method, or "net" - and see the net_type method.
$self->module
Reference to the Verilog::Netlist::Module or
Verilog::Netlist::Interface the net is under.
$self->lsb
The least significant bit number of the net.
$self->msb
The most significant bit number of the net.
$self->name
The name of the net.
$self->net_type
The net type, if one applies. Always a net type keyword
('supply0', 'supply1', 'tri', 'tri0', 'tri1', 'triand', 'trior',
'trireg', 'wand', 'wire', 'wor').
$self->type
The type function is provided for backward compatibility to
Verilog-Perl versions before 3.200. Applications should change to
use data_type() and/or decl_type() instead.
The type function returns an agglomeration of data_type, net_type
and decl_type that worked ok in Verilog, but does not work with
SystemVerilog. Calls to type() will be converted to calls to
data_type, decl_type or net_type in a way that attempts to maintain
backward compatibility, however compatibility is not always
possible.
$self->value
If the net's type is 'parameter', the value from the parameter's
declaration.
$self->width
The width of the net in bits.
MEMBER FUNCTIONS
See also Verilog::Netlist::Subclass for additional accessors and
methods.
$self->lint
Checks the net for errors. Normally called by
Verilog::Netlist::lint.
$self->dump
Prints debugging information for this net.
$self->dump_drivers
Prints debugging information for this net, and all pins driving the
net.
DISTRIBUTION
Verilog-Perl is part of the <http://www.veripool.org/> free Verilog EDA
software tool suite. The latest version is available from CPAN and
from http://www.veripool.org/verilog-perl
<http://www.veripool.org/verilog-perl>.
Copyright 2000-2012 by Wilson Snyder. This package is free software;
you can redistribute it and/or modify it under the terms of either the
GNU Lesser General Public License Version 3 or the Perl Artistic
License Version 2.0.
AUTHORS
Wilson Snyder <wsnyder@wsnyder.org>
SEE ALSO
Verilog-Perl, Verilog::Netlist::Subclass Verilog::Netlist
perl v5.14.2 2012-02-27 Netlist::Net(3)
