irq_gc_mask_clr_bit man page on OpenSuSE

irq_gc_mask_clr_bit man page on OpenSuSE

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IRQ_GC_MASK_CLR_BIT(9)	    Generic interrupt chip	IRQ_GC_MASK_CLR_BIT(9)

NAME
       irq_gc_mask_clr_bit - Mask chip via clearing bit in mask register

SYNOPSIS
       void irq_gc_mask_clr_bit(struct irq_data * d);

ARGUMENTS
       d
	   irq_data

DESCRIPTION
       Chip has a single mask register. Values of this register are cached and
       protected by gc->lock

AUTHORS
       Thomas Gleixner <tglx@linutronix.de>
	   Author.

       Ingo Molnar <mingo@elte.hu>
	   Author.

COPYRIGHT
Kernel Hackers Manual 3.11	 November 2013		IRQ_GC_MASK_CLR_BIT(9)

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