pci_set_cacheline_size man page on OpenSuSE

pci_set_cacheline_size man page on OpenSuSE

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PCI_SET_CACHELINE_SI(9)	      Hardware Interfaces      PCI_SET_CACHELINE_SI(9)

NAME
       pci_set_cacheline_size - ensure the CACHE_LINE_SIZE register is
       programmed

SYNOPSIS
       int pci_set_cacheline_size(struct pci_dev * dev);

ARGUMENTS
       dev
	   the PCI device for which MWI is to be enabled

DESCRIPTION
       Helper function for pci_set_mwi. Originally copied from
       drivers/net/acenic.c. Copyright 1998-2001 by Jes Sorensen,
       <jestrained-monkey.org>.

RETURNS
       An appropriate -ERRNO error value on error, or zero for success.

COPYRIGHT
Kernel Hackers Manual 3.11	 November 2013	       PCI_SET_CACHELINE_SI(9)

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