ACPICPU(4) | Kernel Interfaces Manual | ACPICPU(4) |
The following C-states are typically available. Additional processor or vendor specific states (C4, ..., Cn) are handled internally by acpicpu.
Each state has a latency associated with entry and exit. The higher the state, the lower the power consumption, and the higher the potential performance costs.
The acpicpu driver tries to balance the latency constraints when choosing the appropriate state. One of the checks involves bus master activity; if such activity is detected, a lower state is used. It is known that particularly usb(4) may cause high activity even when not in use. If maximum power savings are desirable, it may be necessary to use a custom kernel without USB support. And generally: to save power with C-states, one should avoid polling, both in userland and in the kernel.
The P0-state is always the highest operating frequency supported by the processor. The number of additional P-states may vary across processors and vendors. Each higher numbered P-state represents lower clock frequencies and hence lower power consumption. Note that while acpicpu always uses the exact frequencies internally, the user-visible values reported by ACPI may be rounded or approximated by the vendor.
Unlike conventional CPU frequency management, ACPI provides support for Dynamic Voltage and Frequency Scaling (DVFS). Among other things, this means that the firmware may request the implementation to dynamically scale the presently supported maximum or minimum clock frequency. For example, if acpiacad(4) is disconnected, the maximum available frequency may be lowered. By default, the NetBSD implementation may manipulate the frequencies according to the notifications from the firmware.
The concept of “duty cycle” is relevant to T-states. It is generally defined to be a fraction of time that a system is in an “active” state. The T0-state has always a duty cycle of 100 %, and thus, comparable to the C0-state, the processor is fully active. Each additional higher-numbered T-state indicates lower duty cycles. At most eight T-states may be available, although also T-states use DVFS.
The duty cycle does not refer to the actual clock signal, but to the time period in which the clock signal is allowed to drive the processor chip. For instance, if a T-state has a duty cycle of 75 %, the CPU runs at the same clock frequency and uses the same voltage, but 25 % of the time the CPU is forced to idle. Because of this, the use of T-states may severely affect system performance.
There are two typical situations for throttling: power management and thermal control. As a technique to save power, T-states are largely an artifact from the past. There was a short period in the x86 lineage when P-states were not yet available and throttling was considered as an option to modulate the processor power consumption. The approach was however quickly abandoned. In modern x86 systems P-states should be preferred in all circumstances. It is also more beneficial to move from the C0-state to deeper C-states than it is to actively force down the duty cycle of a processor.
But T-states have retained their use as a last line of defense against critical thermal conditions. Many x86 processors include a catastrophic shutdown detector. When the processor core temperature reaches this factory defined trip-point, the processor execution is halted without any software control. Before this fatal condition, it is possible to use throttling for a short period of time in order to force the temperatures to lower levels. The thermal control modulation is typically started only when the system is in the highest-power P-state and a high temperature situation exists. After the temperatures have returned to non-critical levels, the modulation ceases.
In addition, the following two variables are available.
Etienne Le Sueur and Gernot Heiser, Dynamic Voltage and Frequency Scaling: The Laws of Diminishing Returns, October, 2010, Proceedings of the 2010 Workshop on Power Aware Computing and Systems (HotPower'10), http://www.ertos.nicta.com.au/publications/papers/LeSueur_Heiser_10.pdf.
David C. Snowdon, Operating System Directed Power Management, School of Computer Science and Engineering, University of New South Wales, March, 2010, PhD Thesis, http://ertos.nicta.com.au/publications/papers/Snowdon:phd.pdf.
Microsoft Corporation, Windows Native Processor Performance Control, Version 1.1a, November, 2002, http://msdn.microsoft.com/en-us/windows/hardware/gg463343.
Venkatesh Pallipadi and Alexey Starikovskiy, The Ondemand Governor. Past, Present, and Future, Intel Open Source Technology Center, July, 2006, Proceedings of the Linux Symposium, http://www.kernel.org/doc/ols/2006/ols2006v2-pages-223-238.pdf.
August 6, 2011 | NetBSD 6.1 |